In recent years, there has been a demand for higher breakdown voltage of the gate breakdown voltage for an LDMOS used as a level shifter and a high breakdown voltage switch in order to reduce a circuit in size. When the gate breakdown voltage is higher, since a high voltage can be subjected to level shift at a time, the circuit can be simplified such that the number of LDMOS elements can be reduced in a level shifter.
For example, the LDMOS in which a gate insulating film is formed of an LOCOS (abbreviation of local oxidation of silicon) film for element isolation has been developed. In addition, in response to recent low-temperature processes, development of a MOSFET with a high breakdown voltage which can be used as a substitute for the LOCOS film has also been expected, and an STI abbreviation of (shallow trench isolation) film has been considered to be used as a gate oxide film.
For example, an LDMOS disclosed in Patent Literature 1 has been proposed. In the LDMOS, an n-type well layer is provided on a surface of a p-type semiconductor substrate, an n-type base region is formed in a surface layer portion of the n-type well layer, and a p-type source region is formed so as to terminate in the n-type base region. A p-type low concentration diffusion layer corresponding to a buffer layer is formed in the surface layer portion of the n-type well layer at a position distant from the n-type base region, and a p-type drain region is formed so as to terminate in the p-type low concentration diffusion layer. Furthermore, an LOCOS film and a gate insulating film are formed between the p-type source region and the p-type drain region, and a gate electrode is formed on surfaces of the LOCOS film and the gate insulating film. A p-type surface diffusion layer is formed in a portion of the n-type well layer, which is located between the n-type base region and the buffer layer, that is, in the surface layer portion in a so-called accumulation region, so as to connect the n-type base region and the buffer layer. In this way, the surface layer portion of the accumulation region is formed of the p-type surface diffusion layer, to thereby reduce an on-resistance as compared with a case where the surface layer portion in the accumulation region is formed of only the n-type well layer.